FAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR DISCRETE OPTOELECTRONIC SEMICONDUCTORS IN AUTOMOTIVE APPLICATIONS

TABLE OF CONTENTS 

AEC-Q102 Failure Mechanism Based Stress Test Qualification for Discrete
Optoelectronic Semiconductors in Automotive Applications

Appendix 1: Definition of a Qualification Family 

Appendix 2: AEC-Q102 Certification of Design, Construction and Qualification 

Appendix 3: AEC-Q102 Qualification Test Plan 

Appendix 4: Data Presentation Format 

Appendix 5: Minimum Parametric Test Requirements and Failure Criteria 

Appendix 6: Destructive Physical Analysis (DPA) 

Appendix 7: Guideline on Relationship of Robustness Validation to AEC-Q102 

Appendix 7a: Reliability Validation for LEDs

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